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Posted Date: 15 Nov 2009 Posted By: Lavanya Member Level: Silver
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2009 Anna University Electronics and Control Engineering M.E DEGREE EXAMINATION JAN-2009. VL1601-DSP INTEGRATED CIRCUITS Question paper
VL1601-DSP INTEGRATED CIRCUITS
Part-A (10*2=20 marks)
1.What is E-beam Mask?
2.Specify two Standard DSP’s used for Communication Purpose.
3.State Sampling Theorem.
4.Draw signal Flow Graph of y(n)=ay(n-1)+x(n).
5.List out the well known techniques for Linear Phase FIR Filter.
6.What is Round off Noise?
7.What s MACD Instructions?
8.Draw the Block Diagram Of Dual Ported Memory?
9. Draw the Block Diagram Of Parallel binary Multiplier?
10.What is the residue Number System?
Part-B(5*16=80 marks)
11.a Compare CMOS and Bipolar Technology.
(or)
b.Explain any one ASIC for digital signal processing in detail with its Architecture.
12.a.The transfer Function of a system is given by
H(z)=(1+z^-1)/(1-½z^-1)(1-z^-1+z^-2).
Realize the system in Cascade and Parallel Structure.
(or)
b.An 8 Point Sequence is given by x(n)={1,1,1,1,2,2,2,2}.Compute 8 point DFT of x(n) by radix-2 DIT-FFT.
13.a.For Analog T.F of Ha(s)=s+2/s²+2s+10 determine H(z) by
i) Impulse Invariant Transformation
ii) Bilinear Transformation
(or)
b.Explain the Procedure to Obtain the product quantization noise model of Second
Order IIR System.
14.a.Explain in Detail and Compare
i) Von Neumann Architecture
ii) Hardvard Architecture
iii) Modified Hardvard Architecture
(or)
b.Write the Steps involved in mapping DSP Algorithm to Hardware
15.a.Draw Layout of FFT Processor and Explain its Operation
(or)
b.What is DCT Processor?Explain its Algorithm which isFollowed in the Processor.
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