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Posted Date: 19 Mar 2009 Posted By: alifbay Member Level: Gold
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2005 Makhanlal Chaturvedi Rashtriya Patrakarita Vishwavidyalaya M.Sc Information Technology Computer Organization and Architecture - June 2005 University Question paper
Duration: Three Hours
Max. Marks: 100
Minimum Passing Marks: 40
Instructions:
1. The Question Paper is divided into five units. Each unit carries an internal choice.
2. Attempt one question from each unit. Thus attempt FIVE questions in all.
3. All questions carry equal marks.
4. Assume suitable data wherever necessary.
5. English version should be deemed to be correct in case of any anomaly in translation.
6.Protest against question paper, if any, should be lodged after paper through Head of Department Study Institute. No boycott of paper should be made under any circumstances by the examinees.
Unit-I
1.a. Draw a block diagram of control unit of a basic computer and explain its working. (12)
b. What is handshaking? (8)
2.a. What is DMA? Explain the different types of DMA. (10)
b. Explain two methods of resolving priority of I/O devices. (10)
Unit-II
3.a. What do you understand by memory? Explain the different types of memories available with their access time, capacity and cost. (15)
b. Explain the term Core Memory. (5)
4.a. What is ALU? Explain. (10)
b. Explain floating-point representation. (10)
Unit-III
5.a. Explain different instruction formats of basic computer with examples. (10)
b. Classify the Micro-operations which are most often encountered in a digital computer. (10)
6.a. Differentiate between fixed length instruction set and variable length instruction set. (10)
b. Describe the various modes of addressing formats. (10)
Unit-IV
7.a. With the help of a neat sketch explain the function of a CPU. (10)
b. Differentiate between Instruction Cycle and Instruction Pipelining. (10)
8.a. Give a overview of a Register Organization (10)
b. Write a short note on Pentium Processor. (10)
Unit-V
9.a. Explain the Instruction Execution characteristics. (10)
b. Differentiate between hardwired control and microprogrammed control. (10)
10.a. Give an architecture of a Reduced Instruction Set. (10)
b. Explain the various phases of an Instruction Cycle. (10)
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