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Posted Date: 25 Dec 2008 Posted By: sridevi Member Level: Diamond
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2006 Birla Institute of Technology-Mesra COMPUTER ORGANIZATION & SOFTWARE SYSTEMS University Question paper
Birla Institute of Technology & Science, Pilani
Distance Learning Programmes Division
Second Semester 2006-2007
Mid-Semester Test
(EC-1 Regular)
Course No. : SS ZG516
Course Title : COMPUTER ORGANIZATION & SOFTWARE SYSTEMS
No. of Pages = 2
No. of Questions = 5
Nature of Exam : Closed Book
Weightage : 40%
Duration : 2 Hours
Date of Exam : 04/02/2007 (AN)
Note:
1. Please follow all the Instructions to Candidates given on the cover page of the answer book.
2. All parts of a question should be answered consecutively. Each answer should start from a fresh page.
3. Mobile phones and computers of any kind should not be brought inside the examination hall.
4. Use of any unfair means will result in severe disciplinary action.
Q.1. Consider a memory system that uses a 32- bit address to address at the byte level, plus a cache memory that uses a 64-byte line size.
a) Assume an associative cache and determine the following:
(i) Address format
(ii) Number of blocks in main memory
(iii) Number of addressable units
b) Assume a 4-way Associative cache with a tag field in the address of 9 bits and determine the following:
(i) Address format
(ii) Number of lines in a set
(iii) Number of lines in cache memory
c) If cache design is changed to 8-way Associative then what will be the address format?
d) Draw the block diagram to show how processor’s requests are interpreted in 4-way Associative cache design i.e. in (b). [4 + 4 + 2 + 3 = 13]
Q.2 (a) Assume a stack-oriented processor that includes the stack operations PUSH and POP. Arithmetic operations automatically involve the top one or two stack elements. Begin with an empty stack. Show the stack elements after execution of each instruction.
PUSH 4
PUSH 7
PUSH 8
ADD
PUSH 10
SUB
MUL
Q.2 (b) A PC- relative mode branch instruction is stored in memory at address 62010 The branch is made to location 53010. The address field in the instruction is 10 bits long. What is the binary value in the instruction? [4 + 3 = 7]
Q.3 (a) Give reasons that the page size in a virtual memory system should be neither very small nor very large.
Q.3 (b) What is the difference between internal fragmentation and external fragmentation? [4 + 4 = 8]
Q.4. Write the sequence of micro-operations required for the given bus structure to
(i) Add a immediate number NUM to the register R0
(ii) Add the contents of memory location NUM to register R0
[6]
Q.5 (a) A disk unit has 20 recording surfaces. It has a total of 14,000 cylinders. There is an average of 400 sectors per track and each sector contains 512 bytes of data. Find the storage capacity of the disk unit. If disk rotates at a speed of 7200 rpm then what is the data transfer rate in bytes per second?
Q.5 (b) What are the common characteristics shared by all RAID levels? [3 + 3 = 6]
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